OStatic

Capsim (r) C Text Mode Kernel (TMK), signal processing and communication blocks(stars), topologies (galaxies), libraries and tools for the development...

Stantor is a Domotic project. It is a SCADA for the computer interface board K8055 (USB bus), K8000 (I2C bus) , X10 modules and also Webcam. It uses...

Ngspice project aims to improve the spice3f5 circuit simulator.

PEP is a modelling and verification framework for parallel systems, providing a large number of different modelling languages and verification techniq...

'atlc' is a CAD package used for analysing and desiging electrical transmission lines of arbitrary cross section. Also for the design of dir...

Wcalc is a tool for the analysis and synthesis of electronic components. Some of the models include coupled microstrip lines, single layer air core ...

Jove - The Open Verification Environment for the Java (TM) Platform

libLCS - Logic Circuit Simulator library in 100% C++. Uses operator overloading and templates to facilitate intuitive syntax for circuit building and ...

The ASCO project aims to bring circuit optimization capabilities to existing SPICE simulators using a high-performance parallel differential evolution...

Juno - OpenVera (TM) to Jove Translator